A cable television (CATV) system is capable of providing a variety of media content, such as video, data, voice, or high-speed Internet services to subscribers. The CATV provider typically delivers the media content from a head end to its subscriber's client devices over a transmission network such as a coaxial network, a fiber optic network, or a hybrid fiber/coax (HFC) network. Requirements for data throughput (or bandwidth) in these CATV networks are growing exponentially as customers demand more content, data services, etc. Though improvements in encoding efficiencies and transport protocols have thus far allowed cable operators to keep pace with subscriber and competitive demands, it is important to continue the analysis of the various network elements that may enhance or inhibit the overall performance of next-generation cable networks.
Most of the radio frequency (RF) amplifiers within the cable television network operate in what is referred to as a “class A” mode of operation, which provides a very high fidelity signal, often quantified in terms of signal-to-noise and signal-to-2nd, 3rd, 4th, 5th . . . harmonic distortion products. However, the power consumption for the class A mode of operation is on the order of 100 times higher than the composite power of an RF output signal. This higher power consumption results from the need to accommodate significant and frequent ‘peak to average’ deviations from the effective signal power, which may include setting the output RF root mean square (rms) amplitude of the amplifier at no more than roughly 25% of the output rail-to-rail range of either voltage or current, depending on the implementation. The higher demand for power consumption may drive up the cost of cable network products that require RF gain blocs (e.g., head end optical transmitters and receivers, fiber-optic nodes, RF distribution amplifiers).
Amplifier power dissipation is a critical issue for high power RF amplifiers used in the cable industry. These amplifiers are typically class A amplifiers and the bias current and voltage are set to accommodate a large headroom for the RF signals. This is desirable because the peak to average power ratio of the RF signals in use is very large, on the order of 14 dB. Because a class A amplifier is biased to support the highest signals peaks, the resulting power efficiency is low, on the order of 2-5%. An approach to resolve this issue is to dynamically change the bias point of the amplifier such that the bias is high only when high signal peaks need to be output. This is particularly effective in reducing power consumption because the signal peaks in many signals occur only during a small fraction of the RF signal to be output. Thus, when the bias may be changed rapidly to a higher bias state to accommodate such peaks and then rapidly returned to a lower bias state that supports smaller signals. Using these techniques, the average amplifier bias may be reduced significantly. For instance a factor 2-3 reduction in bias may be achieved. With digital to analog (DA) converter (DAC) driven amplifiers and digital signal processing, the distortions induced by varying amplifier bias and by generally operating amplifiers at a reduced bias point may be compensated to implement a high performance RF amplifier with dynamic bias operation.
However, changing the bias of an amplifier that is amplifying an RF signal requires two signals, the RF signal and a bias signal, instead of just one RF signal as with a typical amplifier implementation. As a result, the provision of two signals requires two DAC outputs from a signal processing stage that compensates for distortion effects due to the dynamic bias operation.
Typical frequency ranges for the RF signal are 54-1200 or 108-1200 MHz. It is found that in order to obtain an effective reduction of average amplifier bias by dynamically changing the bias point the bandwidth of a “bias control signal” used to change the bias is preferably as much as 200 MHz. These bandwidths are so large that DAC timing for RF signal and bias signal becomes very critical. A DAC generating a bias signal may, for instance, operate using a 750 MHz clock rate and a DAC generating an RF signal may operate using a 3000 MHz clock rate. This puts the RF signal bandwidth and bias signal bandwidth well within the Nyquist range of the DACs. Digital signal processing is used to compensate cross-modulation products between bias signal and RF signal and RF signal distortions. Any change in mutual timing of the two DACs, however, will cause a phase shift in the distortion products and for that reason these DA converters are desirably phase locked to operate reliably as they are synchronized to a single clock cycle. This becomes clear when comparing one 750 MHz bias DAC clock cycle to 1200 MHz RF frequency; a single clock cycle shift on the bias DAC would cause a delay of more than a full signal period. Even a single 3000 MHz clock cycle on the RF DAC is still more than 120 degrees of phase shift for a 1200 MHz signal; much more than may be tolerated in a distortion cancellation scheme. In practice it is difficult to synchronize two high-speed DACs to a single clock signal and a good solution is not available that does not require an ADC monitoring path to watch over the overall system performance.
Hence, there is a need to address amplifier power consumption as well as reducing the number of components required to be supplied with power and RF signals.